Integrated circuits may comprise digital, analog, or mixed-signal circuits. Mixed-signal designs that include both analog and digital blocks in the same integrated circuit are becoming increasingly ubiquitous. Often, mixed-signal integrated circuits may be partitioned into functional blocks. Such partitioning may separate analog and digital portions of the circuit into blocks so as to make the complexity involved in designing such integrated circuits more manageable. These individual blocks may be separately designed and verified using electronic design automation (EDA) tools appropriate for design or verification of the functionality of the blocks. In addition, each block may be either automatically synthesized for physical layout using EDA tools or may be manually laid out. The physical blocks may then be assembled together either in layout or on a circuit to form a complete design of the mixed-signal circuit.
Sizes of integrated circuits have grown to include billions of transistors, leading to massive complexity in verifying physical designs at the system level prior to tape-out. For verification, analog designers would prefer for the entire system to be simulated with SPICE-like accuracy and digital designers would prefer advanced verification methodologies that essentially abstract away analog components.
For the foregoing reasons, approaches to reduce the complexity of verification, while still maintaining an effective level of verification, are desired.